This paper introduces a new paradigm to implement logic gates based on variable capacitance components instead of transistor elements. Using variable capacitors and Bennett clocking, this new logic family is able to discriminate logic states and cascade combinational logic operations. In order to demonstrate this, we use the capacitive voltage divider circuit with the variable capacitor modulated by an input bias state to the set output state. We propose the design of a four-terminal capacitive element which is the building block of this new logic family. Finally, we build a Verilog-A model of an electrically-actuated MEMS capacitive element and analyze the energy transfer and losses within this device during adiabatic actuation. The proposed model will be used for capacitive-based adiabatic logic circuit design and analysis, including construction of reversible gates. © Springer International Publishing AG 2017.