Novel C-V measurements based method for the extraction of GaN buffer layer residual doping level in HEMT
| Auteurs | Nifa I., Leroux C., Torres A., Charles M., Reimbold G., Ghibaudo G., Bano E. |
| Year | 2017-0291 |
| Source-Title | IEEE International Conference on Microelectronic Test Structures |
| Affiliations | CEA-LETI, MINATEC Campus, 17 rue des Martyrs, Grenoble Cedex, France, Univ. Grenoble Alpes, MINATEC/INPG, 3 Parvis Louis Néel, Grenoble, France, IMEP-LAHC, MINATEC/INPG, 3 Parvis Louis Néel, Grenoble, France |
| Abstract | This paper presents a new methodology to characterize the GaN buffer doping level which is a critical parameter for epitaxial fabrication of GaN wafers. As demonstrated in this study, its characterization is challenging due to parasitic effects. Capacitance-Voltage (C-V) measurements are carried out on a Metal Insulator Semiconductor (MIS) structure with a gate on Al2O3 dielectric using a novel configuration. The experimental study is validated with a self-consistent Poisson-Schrodinger (PS) simulation. Finally, our methodology is applied to a new generation of GaN buffer through a fully and partially (without any contacts) processed wafer, with a Hg-probe C-V measurement performed on the partially processed one. © 2017 IEEE. |
| Author-Keywords | |
| Index-Keywords | Capacitance, Gallium nitride, High electron mobility transistors, Metal insulator boundaries, Microelectronics, MIS devices, Semiconductor doping, Silicon wafers, C-V measurement, Capacitance voltage measurements, GaN buffer, GaN buffer layers, Metal insulator semiconductor structures, Parasitic effect, Residual doping, Schrodinger, Wide band gap semiconductors |
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