The mystery of the Z2-FET 1T-DRAM memory
Auteurs | Bawedin M., El Dirani H., Lee K., Parihar M.S., Lacord J., Martinie S., Le Royer C., Barbe J.-C., Mescot X., Fonteneau P., Galy P., Gamiz F., Navarro C., Cheng B., Asenov A., Taur Y., Cristoloveanu S. |
Year | 2017-0306 |
Source-Title | Joint International EUROSOl Workshop and International Conference on Ultimate Integration on Silicon-ULIS, EUROSOI-ULIS 2017 - Proceedings |
Affiliations | Univ. Grenoble Alpes, IMEP-LAHC, Grenoble INP, Minatec, CNRS, Grenoble, France, STMicroelectronics, 850 rue Jean Monnet, Crolles Cedex, France, CEA, LETI, Minatec Campus, Grenoble, France, Univ. of Granada, Spain, Univ. of Glasgow, United Kingdom, Univ. of California, San Diego, CA, United States |
Abstract | We review the operation mechanisms of the Z2-FET underlining its attractiveness as a capacitorless DRAM memory. The main parameters that govern the memory performance are discussed based on systematic experiments and simulations. © 2017 IEEE. |
Author-Keywords | band modulation, carrier lifetime, SOI, Z2-FET |
Index-Keywords | Carrier lifetime, 1t drams, Capacitorless drams, Main parameters, Memory performance, Operation mechanism, Systematic experiment, Z^2-FET, Dynamic random access storage |
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