Vous êtes ici : Accueil > Innovative PCM+OTS device with high sub-threshold non-linearity for non-switching reading operations and higher endurance performance

Publications

Innovative PCM+OTS device with high sub-threshold non-linearity for non-switching reading operations and higher endurance performance

Publié le 29 mars 2018
Innovative PCM+OTS device with high sub-threshold non-linearity for non-switching reading operations and higher endurance performance
Auteurs
Navarro G., Verdy A., Castellani N., Bourgeois G., Sousa V., Molas G., Bernard M., Sabbione C., Noe P., Garrione J., Fellouh L., Perniola L.
Year2017-0378
Source-TitleDigest of Technical Papers - Symposium on VLSI Technology
Affiliations
CEA, LETI, MINATEC Campus, 17 rue des Martyrs, Grenoble Cedex 9, France
Abstract
In this paper we present the engineering of a non-volatile 1S1R memory based on a Phase-Change Memory cell (PCM), consisting in a GeN/Ge2Sb2Te5 layer, stacked with a GeSe-based Ovonic Threshold Switching selector device (OTS). We optimize and analyze separately the two devices, and we propose for the first time an innovative reading strategy of the cross point device, enabled by the improved sub-threshold non-linearity of the OTS selector. A new memory concept is presented and demonstrated in which selector switching is performed only for SET and RESET programming operations and reading is operated without switching the OTS selector, strategy that allows to target outstanding endurances. © 2017 JSAP.
Author-Keywords
 
Index-Keywords
Cell engineering, Switching, VLSI circuits, Cross point, Non-volatile, Phase change memory cells, Reading strategies, Subthreshold, Threshold switching, Phase change memory
ISSN7431562
Lien vers articleLink

Retour à la liste