Technology
| 7-Levels-Stacked Nanosheet GAA Transistors for High Performance Computing
| Sylvain Barraud (CEA-Leti)
| Sylvain Barraud
|
|
Technology
| All-operation-regime characterization and modeling of drain current variability in junctionless and inversion-mode FDSOI transistors
| David Bosch (CEA-Leti)
| David Bosch
| IMEP-LAHC
|
Technology
| 28nm FDSOI CMOS technology (FEOL and BEOL) thermal stability for 3D Sequential Integration: yield and reliability analysis
| C.Cavalcante (CEA-Leti)
| C.Cavalcante
| IMEP-LAHC
STMicroelectronics
|
Technology
| First demonstration of low temperature (≤500°C) CMOS devices featuring functional RO and SRAM bitcells toward 3D VLSI integration
| Claire Fenouillet-Beranger (CEA-Leti)
| Claire Fenouillet-Beranger
| Samsung
|
Technology
| Enabling UTBB Strained SOI Platform for Co-integration of Logic and RF: Implant-Induced Strain Relaxation and Comb-like Device Architecture
| Chen SUN
(National University of Singapore)
| Vincent Barral
| IMEC
SOITEC STMicroelectronics
|
Technology
| Nanosecond Laser Anneal (NLA) for Si-implanted HfO2 Ferroelectric Memories Integrated in Back-End Of Line (BEOL)
| Laurent Grenouillet (CEA-Leti)
| Laurent Grenouillet
| NamLab (GE)
|
Technology
| Vertical Heterojunction Ge0.92Sn0.08/Ge GAA Nanowire pMOSFETs: Low SS of 67 mV/dec, Small DIBL of 24 mV/V and Highest Gm,ext of 870 μS/μm
| Mingshan LIU (PGI 9, Jülich)
| Jean-Michel Hartmann
| Aachen University (GE)
|
Technology
| ExaNoDe: combined integration of chiplets on active interposer with bare dice in a multi-chip-module for heterogeneous and scalable high performance compute nodes
| Pierre-Yves Martinez (LIST)
| Jean Chabonnier
| 3IT Univ. Sherbrooke (CA)
LN2, CNRS, Sherbrooke (CA)
|
Technology
| A SiOx RRAM-based hardware with spike frequency adaptation for power-saving continual learning in convolutional neural networks
| I. Munoz-Martin (Politecnico di Milano)
| Jean-François Nodin
| Weebit
|
Technology
| Variability Evaluation of 28nm FD-SOI Technology at Cryogenic Temperatures down to 100mK for Quantum Computing
| Bruna Cardoso Paz (CEA-Leti)
| Bruna Cardoso Paz
| CEA-IRIG
STMicroelectronics IMEP-LAHC
|