CEA, LETI, MINATEC Campus, 17 rue des Martyrs, Grenoble, France, CNRS-LTM, CEA, LETI, 17 rue des Martyrs, Grenoble, France, STMicroelectronics, 850 rue Jean Monnet, Crolles Cedex, France, Univ. Grenoble Alpes, Grenoble, France

The low temperature integration of new materials (such as SiGe channels for the holes) is mandatory in advanced metal oxide semiconductor field effect transistors (i.e. in 14 nm technology node devices and beyond). In this paper, we have investigated the removal of SiGe oxides prior to Selective epitaxial Growth of Si or SiGe:B in Sources/Drains regions. A very efficient removal of contaminants (C, F, O…) is mandatory if the H2 bake that precedes epitaxy is removed because of thermal budget constraints. As germanium is very reactive in the air, in-situ surface preparation schemes (conducted for instance in a Siconi® chamber) might be useful on SiGe surfaces. This way, the queue-time issues associated with “HF-Last” (HF/HCl follow by deionization water rinse) processes in single wafer wet cleaning tools are avoided. Germanium-rich SiGe layers (Si0.6Ge0.4) were used to characterize the native oxide removal efficiency of “HF-Last” and Siconi® processes. Then, a new surface preparation strategy was developed based on i) a wet chemical oxide formation followed by ii) a standard Siconi® process whose efficiency towards SiO2 has conclusively been demonstrated. Parallel Angle Resolved X-ray Photoelectron Spectroscopy was used to study the chemical composition of the native or chemical oxide and evaluate the efficiency of that treatment on carbon, germanium oxide and silicon oxide. © 2017 Elsevier B.V.

SiGe Siconi® preclean WET clean Grazing XPS Source drain epitaxy

Budget control, Carbon, Decontamination, Dielectric devices, Efficiency, Epitaxial growth, Field effect semiconductor devices, Field effect transistors, Germanium, Germanium oxides, Metal cleaning, Metallic compounds, Metals, MOS devices, MOSFET devices, Oxide semiconductors, Semiconductor devices, Silica, Silicon compounds, Silicon on insulator technology, Silicon oxides, Silicon wafers, Temperature, Transistors, X ray photoelectron spectroscopy, Angle resolved x ray photoelectron spectroscopy, Chemical compositions, Low temperatures, Metal oxide semiconductor, Native oxide removal, Selective epitaxial growth, Source-drain, Surface preparation, Si-Ge alloys