SPICE simulation of 1T1R structures based on a logistic hysteresis operator
| Description | |
| Date | |
| Authors | Patterson G.A., Rodriguez-Fernandez A., Sune J., Miranda E., Cagli C., Perniola L. |
| Year | 2017-0211 |
| Source-Title | 2017 Spanish Conference on Electron Devices, CDE 2017 |
| Affiliations | Departament d'Enginyeria Electrònica, Universitat Autònoma de Barcelona, Spain, CEA, LETI, MINATEC Campus, France |
| Abstract | In this paper a SPICE (Simulation Program with Integrated Circuit Emphasis) implementation of a memristor model able to describe the major and minor current-voltage loops in bipolar resistive switches is reported. In particular, this work addresses the implementation of one transistor-one resistor (1T1R) structures for RRAM applications by means of SPICE simulations. Specifically, the dependence of the low-resistive state on the compliance current is investigated. The model is based on the combination of a diode-like device as the switching element and the logistic hysteron formalism for the memory effect. It is shown how the proposed circuit for the 1T1R structure reproduces the main features of the experimental output curves. © 2017 IEEE. |
| Author-Keywords | 1T1R structure, compliance current, RRAM, SPICE |
| Index-Keywords | Circuit simulation, Electron devices, Random access storage, RRAM, Compliance current, Current voltage, Hysteresis operator, Resistive state, Resistive switches, Simulation program with integrated circuit emphasis, SPICE simulations, Switching elements, SPICE |
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| Link | Link |