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Study of the energy consumption optimization on RRAM memory array for SCM applications

Published on 29 March 2018
Study of the energy consumption optimization on RRAM memory array for SCM applications
Description
 
Date 
Authors
Cagli C., Molas G., Harrand M., Bernasconi S., Charpin C., Hajjam K.E., Nodin J.F., Reimbold G.
Year2017-0276
Source-Title2017 IEEE 9th International Memory Workshop, IMW 2017
Affiliations
Univ. Grenoble Alpes, CEA LETI, France
Abstract
This paper focuses on the programming operation optimization of a HfO2-based Resistive RAM (RRAM) memory array for low power consumption application. We will show how the resistance window (RW) depends on the write/erase energy, and we will give directives to minimize the operating energy cost. In particular, the advantage of short pulse over low current operation is demonstrated. We also link the array size with the programming energy. Gain with smart programming scheme is also discussed. Eventually we explain how the operating energy impacts on the maximum transfer rate (RT) achievable in a product. © 2017 IEEE.
Author-Keywords
Energy consumption, HFO2, Read margin, Resistance window, RRAM, Storage class memory
Index-Keywords
Energy utilization, Hafnium oxides, Memory architecture, RRAM, Energy consumption optimization, HFO2, Low-power consumption, Operating energies, Operation optimization, Read margin, Resistive rams (RRAM), Storage-class memory, Random access storage
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