Impact of gate impedance on dielectric breakdown evaluation for 28 nm FDSOI transistors
| Description | |
| Date | |
| Authors | Diab A., Garros X., Rafik M., Federspiel X., Vincent E., Reimbold G. |
| Year | 2017-0299 |
| Source-Title | Microelectronic Engineering |
| Affiliations | CEA, LETI, MINATEC Campus, Grenoble, France, STMicroelectronics, 850 Rue Jean Monnet, Crolles, France |
| Abstract | In this paper, we studied the influence of adding gate impedance (Rg) on the breakdown reliability of 28 nm Fully-Depleted Silicon-On-Insulator (FDSOI) transistors. We have shown that Rg plays a crucial role by affecting the hardness of breakdown (HBD), the number of functional devices after breakdown (BD) and time-dependent gate oxide breakdown (TDDB) values. More investigations were done to show the correlation how Rg impacts the formation of the percolation path (nearby the source or the drain) and its resulting breakdown resistance. This work shows the importance of considering the real circuit environment to assess the breakdown reliability of digital circuits. © 2017 Elsevier B.V. |
| Author-Keywords | FDSOI, Gate impedance, Reliability, TDDB |
| Index-Keywords | Dielectric materials, Reliability, Silicon on insulator technology, Solvents, Breakdown resistance, FDSOI, Fully depleted silicon-on-insulator, Functional devices, Gate oxide breakdown, Percolation path, TDDB, Time dependent, Leakage currents |
| ISSN | 1679317 |
| Link | Link |