Université Grenoble Alpes, CEA, LETI, MINATEC Campus, CEA-Grenoble, 17 rue des martyrs, Grenoble, France, CNRS, LAAS, 7 avenue du colonel Roche, Toulouse, France, Université de Toulouse, UPS, LAAS, Toulouse, France

This paper studies the self-alignment properties between two chips that are stacked on top of each other with copper pillars micro-bumps. The chips feature alignment marks used for measuring the resulting offset after assembly. The accuracy of the alignment is found to be better than 0.5 ?m in × and y directions, depending on the process. The chips also feature waveguides and vertical grating couplers (VGC) fabricated in the front-end-of-line (FEOL) and organized in order to realize an optical interconnection between the chips. The coupling of light between the chips is measured and compared to numerical simulation. This high accuracy self-alignment was obtained after studying the impact of flux and fluxless treatments on the wetting of the pads and the successful assembly yield. The composition of the bump surface was analyzed with Time-of-Flight Secondary Ions Mass Spectroscopy (ToF-SIMS) in order to understand the impact of each treatment. This study confirms that copper pillars micro-bumps can be used to self-align photonic integrated circuits (PIC) with another die (for example a microlens array) in order to achieve high throughput alignment of optical fiber to the PIC. © 2017 IEEE.

Copper pillars, Micro-bumps, Optical coupling, Self alignment, Self-positioning, Silicon Photonics

Alignment, Copper, Mass spectrometry, Network components, Optical fiber fabrication, Optical fibers, Photonic devices, Photonics, Secondary ion mass spectrometry, Copper pillars, Micro-bumps, Optical couplings, Self alignment, Self-positioning, Silicon photonics, Photonic integration technology