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UTBB-FDSOI complementary logic for high quality analog signal processing

Published on 29 March 2018
UTBB-FDSOI complementary logic for high quality analog signal processing
Description
 
Date 
Authors
Wei Z., Leduc Y., Jacquemod G., De Foucauld E.
Year2017-0148
Source-Title2016 IEEE International Conference on Electronics, Circuits and Systems, ICECS 2016
Affiliations
University of Nice Sophia Antipolis, EpOC, URE UNS 006, Biot, France, CEA-LETI, Grenoble, France
Abstract
An analog clock generator built with complementary logic cells in UTBB-FDSOI delivers the robust symmetrical clocks required to control high-performance differential switched-capacitor circuits. Using back-gate feedback and sizing respecting static and dynamic symmetry, the proposed solution is very tolerant to process inherent variations to the deep nanometer CMOS processes. © 2016 IEEE.
Author-Keywords
analog clock generator, back-gate control, CMOS, complementary logic, process variations, switched-capacitor circuits, symmetrical circuits, UTBB-FDSOI
Index-Keywords
Clocks, CMOS integrated circuits, Electric clocks, Logic circuits, Logic devices, Signal processing, Analog clocks, Back gates, Complementary logic, Process Variation, Switched -capacitor circuits, UTBB-FDSOI, Computer circuits
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