Read full Press Release on CEA-Leti website​​
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SAN FRANCSCO – Feb. 18, 2025 – CEA-Irig, in its collaboration with Quobly, CEA-List and CEA-Leti​, reported today it has developed a unique solution using FD-SOI CMOS technology that provides simultaneous microsecond readouts of tens of quantum devices, while reducing the readout power consumption by 10x and footprint by 2x. Combined with Quobly’s strategy to build qubits out of FD-SOI technology, this readout architecture provides a path to low power and scalable quantum integrated circuits.

In a paper presented at the International Solid-State Circuits Conference ISSCC 2025​, “An 18.5μW/qubit Cryo-CMOS Charge-Readout IC Demonstrating QAM Multiplexing for Spin Qubits”, the innovation is to propose a readout circuit based on a capacitive-feedback transimpedance amplifier (CTIA) that achieves an 18.5μW/qubit power consumption, which is a significant tenfold reduction compared to existing, similar circuits at half the footprint per qubit.

This highly collaborative effort reported at ISSCC was made possible by the unique expertise based in Grenoble. CEA-List offers invaluable guidance to ensure compatibility with future quantum software stacks, while CEA-IRIG provides a one-of-a-kind cryogenic experimental platform. Through their special partnership with Quobly, all divisions of CEA are positioned to pioneer significant breakthroughs in silicon qubit systems.