The rapid evolution of the society in terms of computational needs tends to target applications that were once human exclusive. Development of deep learning algorithms made possible overpassing some capabilities in the task the human brain was performing the best as for instance image and speech recognition, decision making and optimization problems. However, the Artificial Neural Networks (ANNs) capable of solving these tasks use intensively massive amount of data and require multiple operations at the same time. When running ANN algorithms in a classical Von Neumann architecture where the computing unit is separated by the memory, latency and high energy consumption start to rise exponentially with the size of the emulated neural network. From this observation, the scientific community starts looking at brain-inspired computing schemes to overcome the current limitation. In particular, spiking neural networks (SNNs) were early predicted by W. Maass in 1997 to be a suitable candidate to leverage the sparsity of the network while showing egal if not better results than the first generations of ANN. Up until now, some Application Specific Integrated Circuits (ASICs) were proposed by companies such as Intel and IBM to emulate SNN with CMOS-based technology. The number of transistors needed to accomplish some critical functionality like spiking neurons in these solutions is still very large and not suitable for downscaling strategies. In this context, new hardware solutions were proposed to emulate the synaptic and neuronal features while reducing the footprint and the energy consumption. In particular, various types of nano-synapses based on emerging non-volatile memory (NVM) explored multi-level synaptic weights and short-term/long-term memory. Among them, the spintronic solutions are the most advanced in maturity compared to the other technology because magnetic-random-access-memory technology, which represents a binary synapse, has already reached the market for ten years. However, a spiking neuron compatible with spintronic-based synapse is still missing in the literature. The thesis takes place in this context of developing new solutions with spintronics in order to emulate spiking neurons. Magnetic tunnel Junctions (MTJs) have been widely used in spintronics as memory unit because of their high endurance while demonstrating relatively small energy for writing and reading operation and are BEOL CMOS compatible. The solution elaborate along the manuscript takes all the benefits of the MTJs to design a spiking neuron based on the windmill dynamics. The dual-free layer MTJ concept is modelled, designed, nano-patterned and electrically characterized to give a constructive outlook on how viable this structure is for emulating spiking neurons.

Plus d'information :https://www.spintec.fr/phd-defense-mram-based-neuromorphic-cell-for-artificial-intelligence/
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Pour suivre la soutenance ​​​en visioconférence : https://grenoble-inp.zoom.us/j/94805219154​​

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