The continuous evolution of the performance offered by microelectronic circuits for more than 50 years is currently facing physical barriers due to the miniaturization of the devices, making it necessary to rethink the architectures of the computing systems to continue to satisfy the ever-increasing demand for performance and quantities of data, while keeping an acceptable power consumption. Among the new computing paradigms, neuromorphic computing is particularly efficient for a number of ‘cognitive’ type tasks for which current computers are much less efficient than the human brain. These neuromorphic computing systems are based on networks of neurons interconnected by synapses, whose weights (synaptic) are programmed during a learning phase in order to favor or disfavor certain connections to obtain the desired functionality. Currently, the implementation of these networks is done in a purely digital way, using CMOS technology. The synaptic weights are stored in memory. The use of a memristor-type electronic device (whose resistance evolves continuously according to the current flowing through it) would allow simplifying enormously the implementation of these neural networks. Emerging non-volatile resistive memories allow to reach several resistance levels and to behave like a pseudo-memristor. Among these emerging technologies, the SOT-MRAM (Spin Orbit Torque Magnetic Random Access Memory) presents advantages in terms of cost, power consumption/writing speed and especially endurance, properties that are particularly interesting for the learning phase. On the other hand, the relative variation of resistance is relatively low, which makes it sensitive to process variations. The aim of this thesis is therefore to evaluate a multilevel SOT-MRAM technology based on granular systems by circuit design, taking into account the process variations inherent to this technology. The first step will be to develop a compact model of the device taking into account its variability and allowing Monte-Carlo type simulations. The next step will be to use this model to design a neural network whose characteristics will be determined by algorithmic studies conducted in parallel in the team and according to the targeted application. The last step will consist in generating a model of the complete network, for integration in the numerical flow and implementation of the complete system.

Plus d'information :https://www.spintec.fr/phd-defense-design-and-reliability-study-of-crossbar-circuits-based-on-multilevel-spintronic-devices-for-artificial-intelligence/
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